IEEE Flip Flop Clock W23 Interest Form

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Learn the fundamental of digital logic and design a clock from scratch!

Target Audience: Those with interest in...

Designed to go with ECE 15A and ECE 152A (no experience required!)

Logistics or project curriculum:

Full Name *

Email: *

Major: *

Electrical Engineering

Computer Engineering

Computer Science

Other:

What courses relevant to digital logic have you taken? *

ECE 15A

ECE 152A

Other:

Required

What experience do you have with digital logic? (1 - 2 sentences) *

What are you hoping to get out of this guided project? (1 - 2 sentences) *

Please check which lessons you plan to attend? It is highly recommended that you attend ALL sessions to get the most out of this guided project. *

Lab 1: Introduction to Transistors (Wednesday 1/25/23 7:00PM - 9:00PM)

Lab 2: Creating Logic Gates (Wednesday 2/1/23 7:00PM - 9:00PM)

Lab 3: Practical Karnaugh Maps (Wednesday 2/15/23 7:00PM - 9:00PM)

Lab 4: Simple Memory Components (Flip Flops) (Wednesday 2/22/23 7:00PM - 9:00PM)

Lab 5: Assembling the Clock (Wednesday 3/1/23 7:00PM - 9:00PM)

Required

Please add yourself to the projects Discord channel on our IEEE server! https://discord.gg/H3PtKDsw

Also go to #roles and give yourself the project role.

Discord will serve as our only form of communication.

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