We are planning for FREE webinar series on:
1. Hardware Design Debugging with Xilinx VIVADO Tool: Using ILA, VIO, Setup Debug Options on Hardware Debugging
2. Writing Complex VHDL/Verilog Design Systems: An example of AES Encryption/Decryption Design
3. Development of Computer Vision System and Machine Learning Applications with Xilinx Zynq FPGA and HLS/SDSoC:
4. Design with SDAccel, Alveo and VCU1525 Cards: Overview of tools and FPGA's, basic application development with SDAccel for VCU 1525 and Alveo.

If you are interested on it, then please fill the following google form:
The webinar [on 1st topic] will be LIVE on Sunday Feb 17, 2019 and 2nd topic at Feb 24, 3rd topic at March 3rd, and 4th topic at March 10th. The Recorded Links will be shared with the registered enthusiast.

For more details about Digitronix Nepal and LogicTronix, please visit: www.digitronixnepal.com and www.LogicTronix.com