АКОС КВИЗ №2
Lectures 3 - 5
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Task 1 (1 pt): Look at Picture 1. It can be seen that the block of RISC-V assembly code follows the operation on registers defined in magenta color under the comment above. Now look at Picture 2. Describe, which operation does the block of code in that picture describe? Write it down in the format that follows the commented operation in Picture one. 

Notation: (you can use it as is) x5, x6, x7 for registers. | for "or", ^ for "xor", & for "and", ~ for "not", A>> for the right arithmetic shift, L>> for right logical shift, << for left shift, + for addition, - for subtraction, * for multiplication, / for division. // for integer division, % for modulus division.
1 point
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Task 2 (2 pts): Briefly explain the difference between .ascii and .asciz directives.

Look at the attached picture: which of the following orders of directives correspond to the given order of characters in memory (assume the Big-Endian byte ordering):

(a)
.data
    .ascii "Hello"
    .asciz "Hello"

(b)
.data
    .asciz "Hello"
    .ascii "Hello"

2 points
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Task 3 (1 pt): Take a look at the macro `print_val_int(%val)`, defined in the attached picture. As you can see, it is devoted to printing the integer immediate value `val`. Which line of code should be changed and how, so that the given macro will now print the value of `%val` in binary format?
1 point
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Task 4 (1 pt): Let's imagine that we are executing some program on RISC-V, and the Program Counter (PC) is currently set to 0xDEADBEEF, i.e. the address of the first executed base-type (4 byte-long) instruction. After the first instruction execution is completed, and we switch to the execution of the very next instruction, the stored value of PC becomes ..?🤔
1 point
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Task 5 (1 pt): Does the following RISC-V assembly program result in a dead loop? (assume that the x5 register is initially 0)
1 point
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Task 6 (1 pt): Write a single-line macro (name it AND56) for the operation of: x6 = x5 & x6 (bitwise "and"), using .eqv directive.
1 point
Task 7 (1 pt): Select the option, in which all of the defined instruction types (formats) are correctly specified.
1 point
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Task 8 (1 pt): Which of the following statements about branch instructions are NOT true?
1 point
Task 9 (1 pt): Will `muli x5, x5, 16` instruction work? Provide a valid instruction (or sequence of instructions) which will result in the desired value of `x5` register, if you think that the given instruction is invalid. Briefly explain your answer.
1 point
BONUS(1 bp) : Feedback! How do you find this quiz? Is there anything to improve (in general)? Feel free to suggest some cool stuff to implement :)
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