Post test Exp. Logic family

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Digital Logic Families

Roll no

Name

Department (E&TC/ELTX)

1. Select correct formula of noise margin *

1 point

a) VNH = VOH(min) − VIH(min)

b) VNL = VIL(max) − VOL(max)

c) VNL = VOH(min) − VOL(max)

d) Both a and b

2. An IC has an avg. propagation delay of 10 ns and an avg. power dissipation of 2mW. Then speed power product is__ *

1 point

a)50 picoJoules(pJ)

b) 20 nanoJoules(nJ)

c) 2 picoJoules(pJ)

d) 20 picoJoules(pJ)

3. What should be the value of input voltage for an efficient operation of a logic circuit by avoiding the conditions of invalid voltage levels? *

1 point

a. Lower than VIL (max)

b. Higher than VIH (min)

c. Both a and b

d. None of the above

4. The main disadvantage of TTL with totem pole output is *

1 point

a)High power dessipation

b)Lower Fan out

c) Wire ANDing operation is not allowed.

d)Low noise margin

5 Which of the logic family is having higher FAN out *

1 point

a)RTL

b)ECL

c)TTL

d)CMOS

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